What I bring
End-to-end experience from specification, architecture and feasibility studies to transistor-level design, layout support, verification, EM modeling, measurements and customer-facing technical discussions.
Freelance Consulting
I help semiconductor teams move from early feasibility and RF system definition to circuit implementation, EM modeling and lab validation. My work spans automotive, radar, phased array, RFIC, MMIC and mixed-signal ICs up to 120 GHz.
End-to-end experience from specification, architecture and feasibility studies to transistor-level design, layout support, verification, EM modeling, measurements and customer-facing technical discussions.
I support teams in analog/RF system analysis and in developing critical analog/RF building blocks.
Design of LNAs, PAs, mixers, VGAs, phase shifters, attenuators, oscillators, power dividers and combiners, frequency multipliers and dividers, PLLs, power detectors, RF signal monitors for functional safety, calibration and debugging, and other active and passive building blocks.
Bandgaps, LDOs, TIAs, op-amps, filters, bias circuits, analog monitors for functional safety, calibration and debugging, and other analog support building blocks.
RF system concepts, link budget analysis, topology selection, block specification, technology evaluation and quotation support.
EM simulation driven design flow, passive structures modeling and measurement support.
System-level translation of requirements into circuit specifications, design and layout of RF building blocks, analog support circuits and digital control elements in 28 nm CMOS, with measurement support.
Design and layout of a 60 GHz MMIC with LNA, switch, attenuator and PA in SiGe technology, with measurement support.
Design and layout of analog building blocks for ultrasonic distance sensor in 180 nm SOI technology, and speed and position sensor in 180 nm BCD technology including LDOs, bandgaps, current references, oscillators, filters, amplifiers and power-on-reset circuits.
RF and analog supporting blocks in 130 nm CMOS technology.
If you need senior support for architecture, RF system analysis, block design, EM-heavy implementation or validation-driven debug, contact me directly.